Cost-optimized products and open-source software stack are among the updates. Credit: iStock Intel refreshed its FPGA line-up with cost-optimized offerings, released its FPGA software stack as open source, and added a new processor design based on the RISC-V architecture. The first of the new products is the Agilex 3 family of power- and cost-optimized FPGAs available in compact form factors. Agilex follows the same product-naming convention as the desktop Core series; 3 is the lowest end of the performance spectrum, followed by 5, 7, and 9 series in ascending order. The Agilex 3 family will come with two branches: the B-Series and C-Series. The B-Series FPGAs have higher I/O density in smaller form factors at lower power than other Intel FPGAs. B-Series FPGAs are targeted for board and system management, including server platform management (PFM) applications. C-Series FPGAs offer added capabilities for a range of complex programmable logic devices (CPLD) and FPGA applications across vertical markets. Intel also announced the Agilex 5 E-Series as part of its early access program, with samples available to early access customers starting in Q4 2023 and broader availability in Q1 2024. These new additions to the Agilex 5 family are intended to deliver better performance per watt than rival FPGAs, thanks to a manufacturing process shrink. The Intel Agilex 7 FPGAs with R-Tile, first announced in May, are now shipping. They feature CXL 2.0 and PCIe 5.0 bandwidth as well as four times higher CXL bandwidth per port when compared to other competitive FPGA products. Software update and new microcontroller On the software side, Intel is making its Open FPGA Stack (OFS) software available as open source. OFS is intended as a common framework for FPGA development, offering both reference code libraries and upstreamed, open-source kernel drivers for Linux. OFS supports both Agilex and the Stratix 10 line of FPGAs. Another new product is Intel’s Nios V processor IP designs, which is based on the open standard RISC-V architecture. The Nios V/c is a compact microcontroller designed to supplement FPGA implementations. It will also target all devices supported in the Quartus Prime Pro programmable logic device design software, Intel said. Finally, Intel has released the first F2000X Infrastructure Processing Unit (IPU) (better known as a SmartNIC). The first publicly available adapters will come from Napatech, a leading provider of SmartNICs and IPUs. Related content news High-bandwidth memory nearly sold out until 2026 While it might be tempting to blame Nvidia for the shortage of HBM, it’s not alone in driving high-performance computing and demand for the memory HPC requires. By Andy Patrizio May 13, 2024 3 mins CPUs and Processors High-Performance Computing Data Center news CHIPS Act to fund $285 million for semiconductor digital twins Plans call for building an institute to develop digital twins for semiconductor manufacturing and share resources among chip developers. By Andy Patrizio May 10, 2024 3 mins CPUs and Processors Data Center news HPE launches storage system for HPC and AI clusters The HPE Cray Storage Systems C500 is tuned to avoid I/O bottlenecks and offers a lower entry price than Cray systems designed for top supercomputers. By Andy Patrizio May 07, 2024 3 mins Supercomputers Enterprise Storage Data Center news Lenovo ships all-AMD AI systems New systems are designed to support generative AI and on-prem Azure. By Andy Patrizio Apr 30, 2024 3 mins CPUs and Processors Data Center PODCASTS VIDEOS RESOURCES EVENTS NEWSLETTERS Newsletter Promo Module Test Description for newsletter promo module. Please enter a valid email address Subscribe