NEO is developing a 3D DRAM architecture that uses memory stacking to solve the DRAM capacity bottleneck. System memory is a complex problem. More memory means more performance, especially in a virtualized environment. But more memory also requires more power, and that can add up as you start to get into thousands of memory sticks. Plus, you can only put so many memory sticks in a server, depending on the number of slots available. So how do you increase memory capacity? By increasing memory density on the chips, which is easier said than done. However, a startup called NEO Semiconductor is claiming it will be able to increase memory density by up to eight times over standard memory with a breakthrough 3D design. It’s not a new concept; 3D memory stacking has been used in NAND flash to increase capacity for a decade now. Memory transistors can only be so large to fit in the confines of a DRAM chip. Rather than an increase the number of transistors laid out side by side, memory makers began stacking it on top of each other, thus increasing capacity in the same physical space. In the 10 years since 3D stacking began, NAND flash DRAM has reached the 170-layer mark, and SSDs have seen a significant increase in capacity without increasing the number of chips. But the solution has so far not made the jump over to standard DRAM. That’s not for lack of trying. Intel produced a prototype in 2020, but it hasn’t publicly announced any progress since then. NEO Semiconductor’s 3D X-DRAM is similar in technical structure to 3D NAND memory cells, and the company says it can be manufactured using a 3D NAND-like fabrication process. The company says that distinguishes it from other efforts at 3D DRAM that require entirely new manufacturing processes. “Without 3D X-DRAM, the industry faces waiting potential decades, navigating inevitable manufacturing disruptions, and mitigating unacceptable yield and cost challenges,” the company said in a statement. There are many contenders vying to bring DRAM into the world of 3D memory, so it is still far too early to anticipate which direction the industry will take. And once that is decided, the switchover is likely to take some time, says memory specialist Jim Handy, principal analyst with Objective Analysis. However, NEO’s approach takes advantage of all the hard-won learning that NAND fabs have gained, so a transition to this kind of DRAM process should go a little more smoothly than did the 3D NAND transition, Handy said. “I reserve my judgement on a company until after I have seen evidence of a prototype chip. Neo hasn’t yet produced a prototype, so it’s hard to say whether it will live up to its promises, but a 3D DRAM has been proven feasible by Intel and imec, so there’s every reason to believe that it can be manufactured,” Handy said. Related content news High-bandwidth memory nearly sold out until 2026 While it might be tempting to blame Nvidia for the shortage of HBM, it’s not alone in driving high-performance computing and demand for the memory HPC requires. By Andy Patrizio May 13, 2024 3 mins CPUs and Processors High-Performance Computing Data Center news CHIPS Act to fund $285 million for semiconductor digital twins Plans call for building an institute to develop digital twins for semiconductor manufacturing and share resources among chip developers. By Andy Patrizio May 10, 2024 3 mins CPUs and Processors Data Center news HPE launches storage system for HPC and AI clusters The HPE Cray Storage Systems C500 is tuned to avoid I/O bottlenecks and offers a lower entry price than Cray systems designed for top supercomputers. By Andy Patrizio May 07, 2024 3 mins Supercomputers Enterprise Storage Data Center news Lenovo ships all-AMD AI systems New systems are designed to support generative AI and on-prem Azure. By Andy Patrizio Apr 30, 2024 3 mins CPUs and Processors Data Center PODCASTS VIDEOS RESOURCES EVENTS NEWSLETTERS Newsletter Promo Module Test Description for newsletter promo module. Please enter a valid email address Subscribe