The Versal HBM series from Xilinx includes fast memory, secure connectivity and adaptable compute in a single platform. Credit: geralt Xilinx continues to be arguably the most productive chip maker in the Valley with the introduction of the Versal HBM adaptive compute acceleration platform (ACAP), the latest in its Versal processor portfolio. Xilinx is known as a FPGA company, but the Versal line is so much more than that. Versal is the mashup of many different processor technologies into one die. Of course it has the FPGA programmable logic gates, but it also has Arm cores for applications and real-time processing, intelligent engines (AI blocks, DSPs), and I/O (PCIe Gen 5, CXL). The family ranges from the high-end Premium edition to the Versal AI Edge processors. Xilinx The Versal HBM (high bandwidth memory) series combines fast memory, secure connectivity, and adaptable compute in a single platform. It is built specifically for use in data centers, networking, and verticals like aerospace and defense. At the heart of the Versal HBM is HBM2e DRAM on the processor die, providing 820GB/s of throughput and 32GB of capacity for 8X more memory bandwidth and 63% lower power than DDR5 implementations, which has not even been released yet. HBM is an on-chip DRAM that runs much faster than standard DRAM. That, combined with the fact it is on the CPU die rather than separate, physical DRAM sticks, means much faster memory performance and very little latency for compute-intensive, memory-bound applications. It’s also a tremendous networking processor, offering 5.6Tb/s of serial bandwidth with 112Gb/s PAM4 transceivers, 2.4Tb/s of scalable Ethernet bandwidth, 1.2Tb/s of line rate encryption throughput, 600Gb/s of Interlaken connectivity, and 1.5Tb/s of PCIe Gen5 bandwidth with built-in DMA, supporting both CCIX and CXL interconnects. That’s a lot of standards, protocols, and data rates in one package. Xilinx says the Versal HBM processor can offer scalability and performance for 800G routers, switches, and security appliances in a single chip, whereas a traditional network processing unit (NPU) implementation of an 800G next-generation firewall would require multiple NPU devices and DDR modules. Because it’s a FPGA, the Versal HBM is an adaptive, heterogeneous compute platform, which can dynamically reconfigure itself in milliseconds to adapt to evolving algorithms and emerging protocols, the company said. Xilinx has developer kits for both hardware and software developers. Hardware developers can use Xilinx’s Vivado Design Suite to work with the Versal HBM devices, while software developers can use the Xilinx Vitis unified software platform. Even though samples won’t be available until the first half of 2022, developers can start prototyping on Versal Premium series devices and evaluation boards that are available and migrate later to the Versal HBM series when they become available. Related content news High-bandwidth memory nearly sold out until 2026 While it might be tempting to blame Nvidia for the shortage of HBM, it’s not alone in driving high-performance computing and demand for the memory HPC requires. By Andy Patrizio May 13, 2024 3 mins CPUs and Processors High-Performance Computing Data Center news CHIPS Act to fund $285 million for semiconductor digital twins Plans call for building an institute to develop digital twins for semiconductor manufacturing and share resources among chip developers. By Andy Patrizio May 10, 2024 3 mins CPUs and Processors Data Center news HPE launches storage system for HPC and AI clusters The HPE Cray Storage Systems C500 is tuned to avoid I/O bottlenecks and offers a lower entry price than Cray systems designed for top supercomputers. By Andy Patrizio May 07, 2024 3 mins Supercomputers Enterprise Storage Data Center news Lenovo ships all-AMD AI systems New systems are designed to support generative AI and on-prem Azure. By Andy Patrizio Apr 30, 2024 3 mins CPUs and Processors Data Center PODCASTS VIDEOS RESOURCES EVENTS NEWSLETTERS Newsletter Promo Module Test Description for newsletter promo module. Please enter a valid email address Subscribe